1. Field of the Invention
The present invention relates to a semiconductor memory device, in particular, it relates to a dynamic memory which provides an access control circuit and a refresh control circuit.
2. Description of the Related Arts
In this kind of semiconductor memory device in the prior art, eight cell blocks, for example, are provided, and each cell block is provided with a predetermined memory cell array, word decoders, and column decoders, etc. When a block address and row address are output from a refresh control circuit, a predetermined cell block, and a row address in the cell block, are selected sequentially, and a memory cell corresponding to each word line of the plurality of the cell blocks is refreshed sequentially. Then, in accordance with an address signal input from external to an access control circuit, a predetermined memory cell (corresponding to the row address and the column address specified) in a predetermined cell block specified by the address signal is selected, and predetermined data is written from external to the selected memory cell or predetermined data is read from the selected memory cell to external.
A comparator circuit compares the block address output from the refresh control circuit and the block address output from the access control circuit. When the refresh control circuit selects a predetermined cell block, if a selection by the access control circuit of the same cell block is detected by the comparator circuit, the action of the access control circuit is temporarily stopped by the output of the comparator circuit.
On the other hand, when the access control circuit is selecting a predetermined cell, if a selection by the refresh control circuit of the same cell block is detected by the comparator circuit, the action of the refresh control circuit is temporarily stopped by the output of the comparator circuit, and the refresh operation for the cell block is carried over to the next time.
As mentioned above, in the conventional semiconductor memory device, when the specified cell block is in a refresh state, the cell block which is in a refresh state can not be accessed from the external. In such a case, because there is a temporary interruption of the operation of the access control circuit, the operation of the semiconductor memory device and the external circuits connected thereto must be temporarily interrupted, so that a serious problem in which the function is interrupted occurs.